unisonic technologies co., ltd 83cxxx preliminary cmos ic www.unisonic.com.tw 1 of 5 copyright ? 2015 unisonic technologies co., ltd qw-r502-353.c 4-pin p voltage monitors with manual reset input ? description the utc 83cxxx is a microprocessor supervisory circuit. it has an active-low reset and push-pull outputs. the circuit can assert a reset signal as long as the v cc power supplies voltage dropping below a preset threshold and it keep the reset signal for at least 140ms when v cc has risen above the reset threshold. the reset threshold can be operated with multi-supply voltages. the utc 83cxxx provides the circuit with perfect reliability and low cost through eliminating exte rnal components and adjustments when applied with +5v, +3.3v, +3.0v power supply the utc 83cxxx also provide a de-bounced manual reset input. the reset comparator can work despite of fast transients on v cc , and the outputs are guaranteed to be in the right logic state while v cc is down to 1v. in applications, the utc 83cxxx is suitable for computers, intelligent instruments, controllers, critical microprocessor and microcomputer power monitors, portable or battery-powered equipment, automotive. ? features * +3v, +3.3v, and +5v power-supply voltages * full temperature rated * supply current: 5a * available in configuration: push-pull reset output * 140ms minimum power-on reset pulse width * guaranteed reset to v cc = +1v * power supply transient immunity * eliminating external components * manual reset input ? ordering information ordering number package packing 83CXXXG-AD4-R sot-143 tape reel note: xxx: output voltage, re fer to marking information.
83cxxx preliminary cmos ic unisonic technologies co., ltd 2 of 5 www.unisonic.com.tw qw-r502-353.c ? marking information package voltage code marking sot-143 b: 2.93v c: 3.08v ? pin configuration ? pin description pin no pin name description 1 gnd ground 2 reset reset output remains low while v cc is below the reset threshold, and for at least 140ms after v cc rises above the reset threshold. 3 mr manual reset input. a logic low on mr asserts reset. rese t remains asserted as long as mr is low and for at least 140ms after mr returns high, this active-low input has an internal 20k ? pull-up resistor. it can be driven from a ttl or cmos-logic line, or shorted to ground with a switch. leave open if unused. 4 v cc supply voltage (+5v, +3.3v, +3.0v)
83cxxx preliminary cmos ic unisonic technologies co., ltd 3 of 5 www.unisonic.com.tw qw-r502-353.c ? absolute maximum rating parameter symbol ratings unit terminal voltage (respect to gnd) v cc -0.3 ~ +6.0 v reset voltage push-pull reset v -0.3 ~ (v cc +0.3) v open drain -0.3 ~ +6.0 v input current i cc 20 ma output current ( reset ) i out 20 ma power dissipation (ta =+70c) derated above 70c p d 320 mw 4 mw/c operating temperature t opr -40~+105 c storage temperature t stg -65~+150 c note: absolute maximum ratings are those values beyond which the device could be permanently damaged. absolute maximum ratings are stress ratings only and functional device operation is not implied. ? electrical characteristics (v cc = full range, t a =-40c~+105c. typical values are at t a =25c, unless otherwise specified) 83c293 (2.93v) (v cc = 3.3v) parameter symbol test conditions min typ max unit v cc range v cc t a =0c~+70c 1.0 5.5 v t a =-40c~+105c 1.2 5.5 v mr input threshold v ih v cc >v th(max) 1.98 v v il 0.825 v reset threshold v th t a =25c 2.871 2.93 2.988 v supply current i cc v cc <3.6v, t a =-40c~+105c 5 8 a reset output current (push-pull active low) low i ol v cc =2.5v, v 5 . 0 = v reset 8 ma high i oh v cc = 3.3v, v 8 . 2 = v reset 3 ma mr pull-up resistance 10 20 30 k ? reset threshold tempco 70 ppm/c v cc to reset delay v cc = v th ~(v th -100mv) 15 reset active timeout period v cc = v th ( max ) 140 310 520 ms mr minima pulse width t mr 10 s mr glitch immunity (note ) 100 ns mr to reset propagation delay t md 0.5 s 83c308 (3.08v) (v cc =3.3v) parameter symbol test conditions min typ max unit v cc range v cc t a =0c~+70c 1.0 5.5 v t a =-40c~+105c 1.2 5.5 v mr input threshold v ih v cc >v th(max) 1.98 v v il 0.825 v reset threshold v th t a =25c 3.018 3.08 3.141 v supply current i cc v cc <3.6v, t a =-40c~+105c 5 8 a reset output current (push-pull active low) low i ol v cc =2.5v, v 5 . 0 = v reset 8 ma high i oh v cc = 3.3v, v 8 . 2 = v reset 3 ma mr pull-up resistance 10 20 30 k ? reset threshold tempco 70 ppm/c v cc to reset delay v cc = v th ~ (v th -100mv) 15 reset active timeout period v cc = v th ( max ) 140 310 520 ms mr minima pulse width t mr 10 s mr glitch immunity (note ) 100 ns mr to reset propagation delay t md 0.5 s note: ?glitches? of 100ns or less typical values will not generate a reset pulse.
83cxxx preliminary cmos ic unisonic technologies co., ltd 4 of 5 www.unisonic.com.tw qw-r502-353.c ? detailed description the utc 83cxxx have a push-pull output stage. a microprocessor?s (p?s) reset input initiates the microprocessor in a known state. the utc 83cxxx assert a reset signal as long as the v cc power supply voltage drops below a preset threshold. when v cc has risen over the reset threshold, the devices keep the signal for at least 140ms. they have a function of preventing code-execution errors during power-up, power-down, or brownout conditions by resetting. see the manual reset input section if you want to see function that the manual reset input ( mr ) can initiate a reset. manual reset input many products based on microprocessor need manual reset characteristic, allowing them to initiate a reset. reset keeps working while mr is low, and when mr returns high it is for the reset active timeout period (t rp ). ttl or cmos-logic levels, or with open-drain / collector outputs both can drive mr . mr will be started by a logic low on manual reset .because the input has a build-in 20k ? pull-up resistor; it can be left open if it is not used. we can put a 0.1f capacitor from mr to ground if mr is driven from long cables or the device is used in a noisy environment strengthening additional noise capacity. connecting a normally open momentary switch from mr to ground to create a manual-reset function, and ex ternal debounce circuitry is not required. utc 83cxxx v cc gnd reset r1= 100k figure 1. reset valid to v cc = ground circuit
83cxxx preliminary cmos ic unisonic technologies co., ltd 5 of 5 www.unisonic.com.tw qw-r502-353.c ? application information 1. ensuring a valid reset output down to v cc = 0 the utc 83cxxx reset output no more sinks current when v cc drops below 1v?it becomes an open circuit. therefore, high-impedance cmos logic input connected to reset can drift to undetermined voltages. this presents no problem in most applications since most mi croprocessors and other circuitry can?t be operated when v cc is under 1v. in figure 1, however, in applications where reset must be valid down to 0v. in order to causes any stray leakage currents to flow to ground, adding a pull-down resistor to reset , that holding reset low. (r1?s value is not critical and the value 100k ? is large enough not to load reset and small enough to pull reset to ground). 2. benefits of highly accurate reset threshold most microprocessor supervisor ics has reset threshold voltages between 5% and 10% below the value of nominal supply voltages. if using ics rated at only the nominal supply 5%, this leaves an uncertainty zone where the supply is between 5% and 10% low and where the reset may or may not be asserted. the utc 83c308 with high accuracy ensure that the reset is asserted closely to 5% limit and long before the supply has declined to 10% below nominal. ? typical application circuit utc assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all utc products described or contained herein. utc products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.
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